Senior Verification Engineer RF/DSP
New Today
UVM, class-based testbench, VIP integration
DSP verification (FFT, FIR, channelizer)
Python scripting and CI/CD environments
Git proficiency
Adaptive SoC verification flows (Vivado/Vitis)
MATLAB experience preferred
TPBN1_UKTJ
- Location:
- Cheltenham
- Salary:
- From £400 to £450 per day
- Job Type:
- FullTime
- Category:
- Engineering