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Job Description

Formal Verification Engineer - Reading

This role can also be based in Northampton, Dortmund, Lausanne and Copenhagen

An established yet fast-scaling semiconductor company known for developing advanced, low-power, high-speed connectivity solutions used in next- computing and consumer electronics. They’re looking to expand their formal verification capability and are now hiring a skilled Formal Verification Engineer to support their European design teams.

This Formal Verification Engineer will work closely with design, micro-architecture and verification groups to shape and execute effective formal strategies across complex digital IP. The role can be based in Switzerland, the UK, Germany, or Denmark.

Key Responsibilities

Create, refine and apply formal verification methodologies for complex digital blocks Review specifications and RTL to build well-structured, coverage-driven verification plans Develop and maintain formal environments, assertions and models Analyse results, identify root causes and collaborate with design teams to close issues Support sign-off processes and contribute to improving verification flows and automation

Skills & Knowledge

Strong background in formal verification for ASIC or FPGA development Proficiency with assertion-based techniques (e.g., SVA, PSL) Experience using formal verification tools (Cadence ecosystem advantageous but not essential) Scripting skills for automation (Python, TCL, Perl or similar) Understanding of digital design, CPU/ISA concepts and common bus or interconnect protocols Clear communicator with a structured, analytical and cooperative working style

Email - jordan.browne@ic-resources.com

Tel - 01189073075

LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/

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